This invention relates to a board for an ink-jet printhead, the printhead per se and a printing apparatus.
An electrothermal transducer and (heater) and its drive circuit, which are mounted on a printing apparatus in accordance with the conventional ink-jet method, are formed on the same substrate using semiconductor process technology, as illustrated in the specification of Japanese Patent Application Laid-Open No. 5-185594, by way of example.
Heater and the heater drive circuits are formed integrally on the conventional printhead substrate about nozzles that eject ink. FIG. 6 illustrates an example of the substrate layout.
FIG. 7A exemplifies a specific equivalent circuit corresponding to one segment of a portion in which heaters and driver transistors are disposed in the form of an array.
As shown in FIG. 7A, a heater drive signal possesses an amplitude equivalent to the power-supply voltage of a logic circuit. The signal is boosted by a voltage converting circuit and applied to the gate of the driver transistor to drive the heater. The voltage is boosted because driving the gate of the driver transistor by a high voltage lowers the ON resistance of the transistor.
The above will be described in detail with reference to FIG. 7B. The power-supply voltage Vdd of an ordinary logic circuit is 5V, and the voltage obtained by boosting via the voltage converting circuit, namely the gate voltage applied to the gate of the driver transistor, is set to 8V. Accordingly, by setting the threshold voltage of an inverter A, which is provided as the initial stage of the voltage converting circuit, to the vicinity of 3 to 4V, the initial inverter A is capable of performing an inversion satisfactorily at the amplitude of the power-supply voltage of the logic circuit.
FIG. 9 is a diagram showing the layout of the ordinary inverter according to the prior art. Here the ratio of the gate width (W) of a PMOS transistor to the gate width of an NMOS transistor usually is 2:1. The reason for this is as follows: If the PMOS and NMOS transistors have gate widths of the same size, the ON resistance of the PMOS transistor will be twice that of the NMOS transistor. In order to equalize the ON resistances of the two transistors, therefore, it is necessary that size ratio be made 2:1. By equalizing the ON resistances, the threshold voltage of the inverter becomes half the power-supply voltage (Vdd). This is the expedient usually employed to equalize and hence avoid the effects of noise from the side of the power supply and from the side of ground.
However, owing to the higher speed and much smaller design rule of the heater drive circuit and external signal processing circuit, there is a tendency to adopt a lower voltage for the power-supply voltage Vdd of the logic circuit, and it is predicted that the present 5V will soon be replaced by a voltage of 3.3V.
If in such case the threshold voltage of the initial inverter of the voltage converting circuit is kept at the present 3 to 4V, it is conceivable that an inversion will not be performed satisfactorily or that the inversion voltage will not be reached with a logic-signal voltage of 3.3V, as illustrated in FIG. 8. If the initial inverter cannot perform the inversion satisfactorily, there is a possibility that the driving capability of the inverter of the next stage will decline as well as the switching speed.
Owing to the phenomena mentioned above, there is the likelihood that the pulse width of the heater drive signal will vary, making it impossible to implement heater drive normally. If a voltage at which an inversion is possible is not reached, the logic signal may not be transmitted to the next stage. Such an occurrence may make it impossible to achieve heater drive itself.
Furthermore, if the ratio of the gate width W1 of the PMOS transistor to the gate width W2 of the NMOS transistor in the conventional inverter is set to 2:1, as shown in FIG. 9, the threshold voltage of the inverter will be xc2xd Vdd. If the power-supply voltage VHT of the voltage converting circuit is set to 8V, therefore, then the threshold voltage of the initial inverter stage becomes 4V and, as a consequence, the signal is not transmitted to the next stage.
The present invention has been devised in view of the above-described circumstances and its object is to provide a substrate for a printhead, the printhead per se and a printing apparatus, in which even if the voltage of the logic signal is below 3.3V, the threshold voltage of the initial inverter of the voltage converting circuit can be set to a level at which an inversion can be performed satisfactorily.
Furthermore, in recent printheads and printers that use these printheads, there is a growing tendency to adopt a lower voltage for the logic signal voltage owing to the higher speed and much smaller design rule of the heater drive circuit and external signal processing circuit, such as a CPU. The present 5V is rapidly being replaced by 3.3V.
Furthermore, the use of lower voltage for the CPU is proceeding with the greater sophistication of the manufacturing process. For example, power-supply voltage in a case where use is made of a 0.5-xcexcm rule process is on the order of 2.0V, and it is predicted that power-supply voltage in a case where use is made of a 0.15 to 0.18-xcexcm rule process will be 1.5V or less. Equalizing the signal voltage of the external processing circuit and the logic-signal voltage within the head is vital for lowering the overall cost of the apparatus from the viewpoint of commonality. For this reason, the logic-signal voltage within the head is expected to decline in the future, from 3.3V to 2.0V to 1.5V and even lower. With the use of ever lower voltage, there is the possibility that malfunction will occur in the interface between the logic signal and the drive signal of the driver transistor. Accordingly, means for dealing with the lower voltage must be provided and it is also necessary to provide means for eliminating any problems. These are important and unique challenges confronted in the development of printheads.
Accordingly, in order to solve the aforementioned problems and attain the object of the present invention, there is provided a substrate for a printhead having a printing element for ejecting a printing agent, a logic circuit for accepting a logic signal from a transfer source, transistors for driving the printing element by the logic signal, and a voltage converting circuit, which has a plurality of inverters, disposed between gate electrodes of the transistors for converting the voltage of the logic signal, wherein a threshold voltage of an inverter provided at an initial stage of the voltage converting circuit is set to a voltage at which an inversion is possible below a power-supply voltage of the logic circuit, said voltage being lower than a threshold voltage of the other inverters.
A printhead according to the present invention comprises a printing element for ejecting a printing agent, a logic circuit for accepting a logic signal from a transfer source, transistors for driving the printing element by the logic signal, and a voltage converting circuit, which has a plurality of inverters, disposed between gate electrodes of the transistors for converting the voltage of the logic signal, wherein a threshold voltage of an inverter provided at an initial stage of the voltage converting circuit is set to a voltage at which an inversion is possible below a power-supply voltage of the logic circuit, said voltage being lower than a threshold voltage of the other inverters.
A printing apparatus according to the present invention is equipped with a printhead having a printing element for ejecting a printing agent, a logic circuit for accepting a logic signal from a transfer source, transistors for driving the printing element by the logic signal, and a voltage converting circuit, which has a plurality of inverters, disposed between gate electrodes of the transistors for converting the voltage of the logic signal, image data being printed on a printing medium while the logic signal is transferred to the printhead, wherein a threshold voltage of an inverter provided at an initial stage of the voltage converting circuit is set to a voltage at which an inversion is possible below a power-supply voltage of the logic circuit, said voltage being lower than a threshold voltage of the other inverters.
Other objects and advantages besides those discussed above shall be apparent to those skilled in the art from the description of a preferred embodiment of the invention which follows. In the description, reference is made to accompanying drawings, which form a part thereof, and which illustrate an example of the invention. Such example, however, is not exhaustive of the various embodiments of the invention, and therefore reference is made to the claims which follow the description for determining the scope of the invention.